Electronic Devices
& Circuits
(EC-201, DEC-2005)
Note: Section A is compulsory. Attempt any four questions
from Section B and any two questions from
Section C.
Section-A
1.
(a) What is the
main important difference between the characteristics of a simple switch and
those of an ideal diode?
(b) Compare JFET and MOSFET. Mention at least four points.
(c) What is reverse Recovery Time?
(d) A dc
voltage supply provides 60V when output is unloaded. When connected to a load
the output drops to 56V. Calculate the
values of voltage regulation.
(e) What is “Dark current” of a photodiode?
(f) What is negative resistance region?
(g) Which two methods makes the collector current constant.
Explain them.
(h) What is fold back limiting?
(i) Calculate
dc voltage across 1 Kr load for a RC filter (R=120r, C=10m F). The dc voltage
across the initial filter capacitor is
60V.
(j) Draw the piecewise linear equivalent circuit of diode
and explain it briefly.
Section-B
2. Explain
the working of CMOS Invertor. Also mention the applications and advantages over
other approaches.
3.
(a) Describe the differences between re and hybrid
equivalent for a BJT transistor.
(b) For each model, list the conditions under which it
should be applied.
4. A full wave
bridge rectifier with 120V rms sinusoidal input has a load resistor of 1kΩ.
(i) If silicon diodes are employed, what is dc
voltage available at load?
(ii) Determine required PIV rating of each
diode.
(iii) Find maximum current through each diode
during condition.
(iv) What is required power rating of each
diode?
5. A silicon transistor with β = 100 is to be used in self
biasing circuit shown in figure below, such that the Q-point corresponds to VCE = 12V and IC =
2m A. Find RE if VCC = 24V and RC = 5KΩ.
Fig.
6.
(a) What is Miller Theorem?
(b) Explain analysis of emitter
follower by using this theorem.
Section-C
7.
(a) What is the
significant difference between the construction of an enhancement-type
MOSFET and a depletion type MOSFET?
(b) Sketch
the circuit of a CS amplifier. Derive the expression for the voltage gain at
low frequencies.
8.
(a) For a zener diode
network shown in below fig. Determine VL , VR, IZ and PZ.
(b) What do you mean by hot carrier diode?
Compare the characteristics of hot carrier and p-n junction diode?
Fig.
9.
(a) Design a self-bias network using a JFET
transistor with IDSS = 8m A and VP = -6V to have a Qpoint at IDQ = 4m A using a
supply of 14V. Assume the RD = 3RS and use standard values.
(b) Discuss the three
configurations of FET biasing. Explain any one in detail.
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