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**Roll No. .................**

**Total No. of Questions : 13] [Total No. of Pages : 02**

**Paper ID [A0305]**

**(Please fill this Paper ID in OMR Sheet)**

**B.Sc. IT (201) (S05 / New) (Sem. - 2**

**nd**

**)**

**DIGITAL ELECTRONICS FUNDAMENTALS**

**Time : 03 Hours Maximum Marks : 75**

**Instruction to Candidates:**

**1)**Section - A is

**Compulsory.**

**2)**Attempt any

**Nine**questions from Section - B.

**Section - A**

*(15***x**

*2 = 30)*

*Q1)*
a) Convert Hex BSC to binary.

b) Add binary numbers: 1101 + 1001 + 1111.

c) Convert decimal 100. 5 to binary.

d) What do you mean by minterm and maxterm?

e) Write De-Morgans theorem.

f) Draw the symbol of a 4 input NAND gate and 3-input X-OR.

g) What is the role of a half adder and half subtractor?

h) What do you mean by combinational circuits? Give examples.

i) Where do we use MUX and DEMUX?

j) Write the truth table of half adder and draw its circuit.

k) What are the various types of Flip Flop?

l) Where do we use Flip Flop and memories?

m) How Register constitute a memory?

n) Explain what do you mean by Main and Secondary memories.

o) Where do we use D-Flip Flop and clocked Flip Flops?

*J-8668[S-9700672]*

*P.T.O.***Section - B**

*(9***x**

*5 = 45)***If X = 1101. 110 and y = 1001.101 (both in binary)**

*Q2)*
find x + y and x – y (by 2’s complement method).

**Convert Hex CF 8.7 to binary, octal and decimal system.**

*Q3)***Simplify the following functions by K-map:**

*Q4)*
(a) F(A, B, C) = Ó(0, 2, 3, 4, 6)

(b) xy + yz + x

*y*′z**Simplify the following expression in (a) S-O-P and (b) P-O-S:**

*Q5)**x*′

*z*′ +

*y*′

*z*′ +

*yz*′ +

*xy*

**Write the truth table of a Full Adder and then from it derive the circuit in**

*Q6)*
terms of half adders.

**Draw the circuit of a 2 to 4 decoder and explain its function.**

*Q7)***Explain how 3 to 8 decoder function can be obtained from a demultiplexer**

*Q8)*
(1 to 8).

**Draw the symbols and write the truth tables of the various logic gates you**

*Q9)*
have studied.

**Draw the circuit of an S-R Flip Flop using NAND gates only. From it derive**

*Q10)*
the circuit of a D-Flip Flop and explain its truth table.

**How can you realize-the edge triggered J-K Flip Flop from an S-R Flip Flop?**

*Q11)*
Write the truth table of J-K Flip Flop and explain how race-around
problem

can be solved in it.

**Explain the difference between the following memories:**

*Q12)*
(a) Volatile and Non-volatile.

(b) Static and dynamic.

(c) Sequential and Random access.

(d) Magnetic and semiconductor.

**Discuss:**

*Q13)*
(a) Classification of memories.

(b) Basic memory structure.

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