## Digital Circuits And Logic Design Question Paper of 3rd Semester CSE74 Download Previous Years Question Paper 2

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Roll No: .......:..........
Total No. of Questions : 091
Paper ID [A0453]
B. Tech. (Sem. – 3rd )
DTGTTAL CTRCUTTS & LOGIC DESTGN (CS - 205)
Time : 03 Hours
Instruction to Candidates:
1) Section - A is Compulsory.
2) Attempt any Four questions from Section - B.
3) Attempt any Two questions from Section - C.

Section - A
Ql)
a)The decimal equivalent of Binary number 11010 is
(A) 26                            (B) 36
(c) 16                             (D) 23
b) 1's complement representation of decimal number of -17 by using 5 bit
representation is
(A) 1110 1110               (B) 11011101,
(c) 1100 1100                (D) 0001 0001
c) The excess 3code of decimal number 26 is
(A) 0100 1001               (B) 01011001
(c) 1000 1001                (D) 01001101
d) How many AND gates are required to realize Y: CD + EF + G
(A) 4                              (B) 5
(c) 3                               (D) 2
e) How many select lines will a 16 to 1 multiplexer will have
(A) 4                                        (B) 3
(c) 5                                         (D) 1.
f) How many flip flops are required to construct a decade coun
(A) 10                                      (B) 3
(c) 4                                         (D) 2
g) Which TTL logic gate is used for wired Ending
(A) Open collector output       (B) Totem Pole
(C) Tri state output                 (D) ECL gates
h) CMOS circuits consume power
(A) Equal to TTL           (B) Less than TTL
(C) Twice of TTL           (D) Thrice of TTL
i) IC 7490 contains flip flops
(A) 4                              (B) 3
(c) 2                               (D) 10
j) In a RAM, information can be stored
(A) By the user, number of times.
(B) By the user, only once
(C) By the manufacturer, a number of times.
(D) By the manufacturer only once.

Section - B

Q2) (a) Convert decimal 177 .25 to octal number.,
(b) Perform following subtraction
(i) 11001-10110 using 1's complement.
(ii) 11011-11001 using 2's complement.
Q3)
(a) Reduce the following equation using k-map
Y = ABC + ACD + AB + ABCD + ABC.
(b) Write the expression for Boolean function
F(A,B,C) : ∑m (1, 4, 5, 6,7) in standard POS form.

Q4) Explain working of three state TTL.

Q5) What do you mean by interfacing? Explain its need. How will you interface
TTL to CMOS?

Q6)
(a) Implement the following function using a 3 line to 5 line decoder
S(A, B, C) =∑m (1,2, 4,7)
C(A, B, C) = ∑m (3, 5, 6,7).
(b) How will you form an 5 bit adder using 2 four bit adder IC's 7453.

Section - C
Q7)
(a) Explain the operation of octal to binary encoder.
(b) Explain the working of master slave JK flip flop.
Q8)
(a) Explain how parallel In Serial Out (PISO) shift register works.
(b) Design a mod-6 up counter.
Q9)
a) Explain how EPROM memory cell works.

(b) Explain the working of dual slope A/D converter.